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 MMDF3N06VL Power MOSFET 3 Amps, 60 Volts
N-Channel SO-8, Dual
Designed for low voltage, high speed switching applications in power supplies, converters and power motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients.
Features http://onsemi.com
VDSS 60 V RDS(ON) TYP 130 m ID MAX 3.0 A
* On-resistance Area Product about One-half that of Standard * * * * * *
MOSFETs with New Low Voltage, Low RDS(on) Technology Faster Switching than E-FETt Predecessors Avalanche Energy Specified IDSS and VDS(on) Specified at Elevated Temperature Static Parameters are the Same for both TMOS V and TMOS E-FET Miniature SO-8 Surface Mount Package - Saves Board Space Mounting Information for SO-8 Package Provided
N-Channel D
G S
MAXIMUM RATINGS (TJ = 25C unless otherwise noted)
Rating Drain-to-Source Voltage Drain-to-Gate Voltage, (RGS = 1 M) Gate-to-Source Voltage - Continuous Drain Current - Continuous @ TA = 25C Drain Current - Continuous @ TA = 100C Drain Current - Single Pulse (tp 10 ms) Total Power Dissipation @ TA = 25C (Note 1) Operating and Storage Temperature Range Single Pulse Drain-to-Source Avalanche Energy - Starting TJ = 25C (VDD = 25 Vdc, VGS = 5.0 Vdc, Peak IL = 3.3 Apk, L = 10 mH, RG = 25 ) Thermal Resistance, Junction to Ambient (Note 1) Maximum Lead Temperature for Soldering Purposes, 0.0625 from case for 10 seconds Symbol VDSS VDGR VGS ID ID IDM PD TJ, Tstg EAS Value 60 60 15 3.3 0.7 10 2.0 -55 to 150 54 Unit Vdc Vdc Vdc Adc Apk W C mJ A L Y W 8 1 SO-8 CASE 751 STYLE 11
MARKING DIAGRAM
8 3N06V ALYW 1
= Assembly Location = Wafer Lot = Year = Work Week
PIN ASSIGNMENT
Source-1 RJA TL 62.5 260 C/W C Gate-1 Source-2 Gate-2 1 2 3 4 8 7 6 5 Drain-1 Drain-1 Drain-2 Drain-2
Top View
1 Mounted on G10/FR4 glass epoxy board using minimum recommended footprint.
ORDERING INFORMATION
Device MMDF3N06VLR2 Package SO-8 Shipping 2500 Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
(c) Semiconductor Components Industries, LLC, 2004
1
April, 2004 - Rev. 2
Publication Order Number: MMDF3N06VL/D
MMDF3N06VL
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
Characteristic OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (VGS = 0 Vdc, ID = 0.25 mAdc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = 60 Vdc, VGS = 0 Vdc) (VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150C) Gate-Body Leakage Current (VGS = 15 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS (Note 1) Gate Threshold Voltage (VDS = VGS, ID = 250 mAdc) Threshold Temperature Coefficient (Negative) Static Drain-to-Source On-Resistance (VGS = 5.0 Vdc, ID = 3.3 Adc) Drain-to-Source On-Voltage (VGS = 5.0 Vdc, ID = 3.3 Adc) (VGS = 5.0 Vdc, ID = 1.65 Adc, TJ = 150C) Forward Transconductance (VDS = 15 Vdc, ID = 1.65 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Gate Charge (VDS = 48 Vdc, ID = 3.3 Adc, VGS = 5.0 Vdc) (VDD = 30 Vdc, ID = 3.3 Adc, VGS = 5.0 Vdc, 5 0 Vdc RG = 9.1 ) td(on) tr td(off) tf QT Q1 Q2 Q3 SOURCE-DRAIN DIODE CHARACTERISTICS Forward On-Voltage (Note 1) Reverse Recovery Time (IS = 3.3 Adc, VGS = 0 Vdc, 3 3 Adc Vdc dIS/dt = 100 A/s) Reverse Recovery Storage Charge 1. Pulse Test: Pulse Width 300 ms, Duty Cycle 2%. 2. Switching characteristics are independent of operating junction temperature. (IS = 3.3 Adc, VGS = 0 Vdc) (IS = 3.3 Adc, VGS = 0 Vdc, TJ = 150C) VSD trr ta tb QRR - - - - - - 0.84 0.67 58 38 20 0.11 1.2 - - - - - mC Vdc ns - - - - - - - - 10 30 32 28 9.0 1.5 4.3 3.5 20 60 60 60 20 - - - nC ns (VDS = 25 Vdc, VGS = 0 Vdc, Vd Vd f = 1.0 MHz) Ciss Coss Crss - - - 340 110 27 480 150 50 pF VGS(th) 1.0 - RDS(on) - VDS(on) - - gFS 1.0 - - 3.0 0.5 0.4 - Mhos 0.12 0.13 Vdc 1.5 3.0 2.0 - Vdc mV/C W V(BR)DSS 60 - IDSS - - IGSS - - - - 10 100 100 nAdc - 66 - - Vdc mV/C mAdc Symbol Min Typ Max Unit
http://onsemi.com
2
MMDF3N06VL
PACKAGE DIMENSIONS
SO-8 CASE 751-07 ISSUE AB
-X- A
8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 SOURCE 1 GATE 1 SOURCE 2 GATE 2 DRAIN 2 DRAIN 2 DRAIN 1 DRAIN 1 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
B
1 4
S
0.25 (0.010)
M
Y
M
-Y- G C -Z- H D 0.25 (0.010)
M SEATING PLANE
K
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
SOLDERING FOOTPRINT*
1.52 0.060 7.0 0.275 4.0 0.155
STYLE 11: PIN 1. 2. 3. 4. 5. 6. 7. 8.
0.6 0.024
1.270 0.050
SCALE 6:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
3
MMDF3N06VL
E-FET is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
http://onsemi.com
4
MMDF3N06VL/D


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